View HCS500SM_5103278.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? 2002 microchip technology inc. ds40153c-page 1 hcs500 features security ? encrypted storage of manufacturers code ? encrypted storage of crypt keys ? up to seven transmitters can be learned ?k ee l oq code hopping technology ? normal and secure learning mechanisms operating ? 3.0v5.5v operation ? internal oscillator ? auto bit rate detection other ? stand-alone decoder chipset ? external eeprom for transmitter storage ? synchronous serial interface ? 1 kbit user eeprom ? 8-pin dip/soic package typical applications ? automotive remote entry systems ? automotive alarm systems ? automotive immobilizers ? gate and garage openers ? electronic door locks ? identity tokens ? burglar alarm systems compatible encoders all k ee l oq encoders and transponders configured for the following setting: ? pwm modulation format (1/3-2/3) ?t e in the range from 100us to 400us ?10 x t e header ? 28-bit serial number ? 16-bit synchronization counter ? discrimination bits equal to serial number 8 lsbs ? 66- to 69-bit length code word. description the microchip technology inc. hcs500 is a code hop- ping decoder designed for secure remote keyless entry (rke) systems. the hcs500 utilizes the pat- ented k ee l oq code hopping system and high security learning mechanisms to make this a canned solution when used with the hcs encoders to implement a uni- directional remote and access control systems. the hcs500 can be used as a stand-alone decoder or in conjunction with a microcontroller. package type block diagram the manufacturers code, crypt keys, and synchroniza- tion information are stored in encrypted form in external eeprom. the hcs500 uses the s_dat and s_clk inputs to communicate with a host controller device. the hcs500 operates over a wide voltage range of 3.0 volts to 5.5 volts. the decoder employs automatic bit-rate detection, which allows it to compensate for wide variations in transmitter data rate. the decoder contains sophisticated error checking algorithms to ensure only valid codes are accepted. hcs500 pdip, soic 1 2 3 4 v dd ee_clk ee_dat mclr 8 7 6 5 v ss rfin s_clk s_dat reception register external control decryptor rfin oscillator s_dat s_clk mclr eeprom ee_dat ee_clk k ee l oq ? code hopping decoder
hcs500 ds40153c-page 2 ? 2002 microchip technology inc. 1.0 system overview key terms the following is a list of key terms used throughout this data sheet. for additional information on k ee l oq and code hopping, refer to technical brief 3 (tb003). ? rke - remote keyless entry ? button status - indicates what button input(s) activated the transmission. encompasses the 4 button status bits s3, s2, s1 and s0 (figure 7-2). ? code hopping - a method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. ? code word - a block of data that is repeatedly transmitted upon button activation (figure 7-1). ? transmission - a data stream consisting of repeating code words (figure 7-1). ? crypt key - a unique and secret 64-bit number used to encrypt and decrypt data. in a symmetri- cal block cipher such as the k ee l oq algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. ? encoder - a device that generates and encodes data. ? encryption algorithm - a recipe whereby data is scrambled using a crypt key. the data can only be interpreted by the respective decryption algorithm using the same crypt key. ? decoder - a device that decodes data received from an encoder. ? decryption algorithm - a recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. ? learn C learning involves the receiver calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. the k ee l oq product family facil- itates several learning strategies to be imple- mented on the decoder. the following are examples of what can be done. - simple learning the receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code words encrypted portion. - normal learning the receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code words encrypted portion. - secure learn the transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to generate the transmitters crypt key. the receiver uses this seed value to derive the same crypt key and decrypt the received code words encrypted portion. ? manufacturers code C a unique and secret 64- bit number used to generate unique encoder crypt keys. each encoder is programmed with a crypt key that is a function of the manufacturers code. each decoder is programmed with the manufac- turer code itself. 1.1 hcs encoder overview the hcs encoders have a small eeprom array which must be loaded with several parameters before use. the most important of these values are: ? a crypt key that is generated at the time of pro- duction ? a 16-bit synchronization counter value ? a 28-bit serial number which is meant to be unique for every encoder the manufacturer programs the serial number for each encoder at the time of production, while the key gen- eration algorithm generates the crypt key (figure 1-1). inputs to the key generation algorithm typically consist of the encoders serial number and a 64-bit manufac- turers code, which the manufacturer creates. note: the manufacturer code is a pivotal part of the systems overall security. conse- quently, all possible precautions must be taken and maintained for this code.
? 2002 microchip technology inc. ds40153c-page 3 hcs500 figure 1-1: creation and storage of crypt key during production the 16-bit synchronization counter is the basis behind the transmitted code word changing for each transmis- sion; it increments each time a button is pressed. due to the code hopping algorithms complexity, each incre- ment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. figure 1-2 shows how the key values in eeprom are used in the encoder. once the encoder detects a button press, it reads the button inputs and updates the syn- chronization counter. the synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. this data will change with every button press, its value appearing externally to randomly hop around, hence it is referred to as the hopping portion of the code word. the 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. the code word format is explained in greater detail in section 7.2. a receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firm- ware that allows the decoder to operate in conjunction with an hcs500 based transmitter. section 3.0 provides detail on integrating the hcs500 into a sys- tem. a transmitter must first be learned by the receiver before its use is allowed in the system. learning includes calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. in normal operation, each received message of valid format is evaluated. the serial number is used to deter- mine if it is from a learned transmitter. if from a learned transmitter, the message is decrypted and the synchro- nization counter is verified. finally, the button status is checked to see what operation is requested. figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. figure 1-2: building the transmitted code word (encoder) transmitter manufacturers serial number code crypt key key generation algorithm serial number crypt key sync counter . . . hcs500 production programmer eeprom array button press information eeprom array 32 bits encrypted data serial number transmitted information crypt key sync counter serial number k ee l oq encryption algorithm
hcs500 ds40153c-page 4 ? 2002 microchip technology inc. figure 1-3: basic operation of receiver (decoder) note: circled numbers indicate the order of execution. 2.0 pin assignment button press information eeprom array manufacturer code 32 bits of encrypted data serial number received information decrypted synchronization counter check for match sync counter serial number k ee l oq decryption algorithm 1 3 4 check for match 2 perform function indicated by button press 5 crypt key pin decoder function i/o (1) buffer type (1) description 1v dd p power connection 2 ee_clk ottl clock to i 2 c ? eeprom 3 ee_dat i/o ttl data to i 2 c eeprom 4mclr i st master clear input 5 s_dat i/o ttl synchronous data from controller 6 s_clk i ttl synchronous clock from controller 7 rfin i ttl rf input from receiver 8gnd p ground connection note: p = power, i = in, o = out, and st = schmitt trigger input.
? 2002 microchip technology inc. ds40153c-page 5 hcs500 3.0 decoder operation 3.1 learning a transmitter to a receiver (normal or secure learn) before the transmitter and receiver can work together, the receiver must first learn and store the following information from the transmitter in eeprom: ? a check value of the serial number ? the crypt key ? the current synchronization counter value the decoder must also store the manufacturers code (section 1.1) in protected memory. this code will typically be the same for all of the decoders in a sys- tem. the hcs500 has seven memory slots, and, conse- quently, can store up to seven transmitters. during the learn procedure, the decoder searches for an empty memory slot for storing the transmitters information. when all of the memory slots are full, the decoder will overwrite the last transmitters information. to erase all of the memory slots at once, use the erase_all com- mand (c3h). 3.2 learning procedure learning is initiated by sending the activate_learn (d2h) command to the decoder. the decoder acknowl- edges reception of the command by pulling the data line high. for the hcs500 decoder to learn a new transmitter, the following sequence is required: 1. activate the transmitter once. 2. activate the transmitter a second time. (in secure learning mode, the seed transmission must be transmitted during the second stage of learn by activating the appropriate buttons on the transmitter.) the hcs500 will transmit a learn-status string, indicating that the learn was successful. 3. the decoder has now learned the transmitter. 4. repeat steps 1-3 to learn up to seven transmitters note 1: learning will be terminated if two nonsequential codes were received or if two acceptable codes were not decoded within 30 seconds. 2: if more than seven transmitters are learned, the new transmitter will replace the last transmitter learned. it is, therefore, not possible to erase lost transmitters by repeatedly learning new transmitters. to remove lost or stolen transmitters, erase_all transmitters and relearn all available transmitters. 3: learning a transmitter with a crypt key that is identical to a transmitter already in mem- ory replaces the existing transmitter. in practice, this means that all transmitters should have unique crypt keys. learning a previously learned transmitter does not use any additional memory slots. the following checks are performed by the decoder to determine if the transmission is valid during learn: ? the first code word is checked for bit integrity. ? the second code word is checked for bit integrity. ? the crypt key is generated according to the selected algorithm. ? the hopping code is decrypted. ? the discrimination value is checked. ? if all the checks pass, the key, serial number check value, and synchronization counter values are stored in eeprom memory. figure 3-1 shows a flow chart of the learn sequence. figure 3-1: learn sequence enter learn mode wait for reception of second compare discrimination value with serial number use generated key to decrypt equal? sync. counter value crypt key exit learn successful. store: learn unsuccessful no yes wait for reception of a valid code non-repeated valid code generate key from serial number/ seed value serial number check value
hcs500 ds40153c-page 6 ? 2002 microchip technology inc. 3.3 validation of codes the decoder waits for a transmission and checks the serial number to determine if it is a learned transmitter. if it is, it takes the code hopping portion of the transmis- sion and decrypts it, using the crypt key. it uses the dis- crimination value to determine if the decryption was valid. if everything up to this point is valid, the synchronization counter value is evaluated. 3.4 validation steps validation consists of the following steps: 1. search eeprom to find the serial number check value match 2. decrypt the hopping code 3. compare the 10 bits of the discrimination value with the lower 10 bits of serial number 4. check if the synchronization counter value falls within the first synchronization window. 5. check if the synchronization counter value falls within the second synchronization window. 6. if a valid transmission is found, update the synchronization counter, else use the next transmitter block, and repeat the tests. figure 3-2: decoder operation transmission received? does ser # check val match? decrypt transmission is decryption valid? is counter within 16? is counter within 16k? update counter execute command save counter in temp location start no no no no yes yes yes yes yes no and
? 2002 microchip technology inc. ds40153c-page 7 hcs500 3.5 synchronization with decoder (evaluating the counter) the k ee l oq technology patent scope includes a sophisticated synchronization technique that does not require the calculation and storage of future codes. the technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated away from the receiver. figure 3-3 shows a 3-partition, rotating synchronization window. the size of each window is optional but the technique is fundamental. each time a transmission is authenticated, the intended function is executed and the transmission's synchronization counter value is stored in eeprom. from the currently stored counter value there is an initial "single operation" forward win- dow of 16 codes. if the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization counter will be stored. storing the new synchronization counter value effectively rotates the entire synchroniza- tion window. a "double operation" (resynchronization) window fur- ther exists from the single operation window up to 32k codes forward of the currently stored counter value. it is referred to as "double operation" because a trans- mission with synchronization counter value in this win- dow will require an additional, sequential counter transmission prior to executing the intended function. upon receiving the sequential transmission the decoder executes the intended function and stores the synchronization counter value. this resynchronization occurs transparently to the user as it is human nature to press the button a second time if the first was unsuc- cessful. the third window is a "blocked window" ranging from the double operation window to the currently stored synchronization counter value. any transmission with synchronization counter value within this window will be ignored. this window excludes previously used, perhaps code-grabbed transmissions from accessing the system. figure 3-3: synchronization window blocked entire window rotates to eliminate use of previously used codes single operation window window (32k codes) (16 codes) double operation (resynchronization) window (32k codes) stored synchronization counter value
hcs500 ds40153c-page 8 ? 2002 microchip technology inc. 4.0 interfacing to a microcontroller the hcs500 interfaces to a microcontroller via a syn- chronous serial interface. a clock and data line are used to communicate with the hcs500. the microcon- troller controls the clock line. there are two groups of data transfer messages. the first is from the decoder whenever the decoder receives a valid transmission. the decoder signals reception of a valid code by taking the data line high (maximum of 500 ms) the microcon- troller then services the request by clocking out a data string from the decoder. the data string contains the function code, the status bit, and block indicators. the second is from the controlling microcontroller to the decoder in the form of a defined command set. figure 4-1 shows the hcs500 decoder and the i/o interface lines necessary to interface to a microcontrol- ler. 4.1 valid transmission message the decoder informs the microcontroller of a valid transmission by taking the data line high for up to 500 ms. the controlling microcontroller must acknowl- edge by taking the clock line high. the decoder then takes the data line low. the microcontroller can then begin clocking a data stream out of the hcs500. the data stream consists of: ? start bit 0. ? 2 status bits [repeat, vlow]. ? 4-bit function code [s3 s2 s1 s0]. ? stop bit 1. ? 4 bits indicating which block was used [tx3tx0]. ? 4 bits indicating the number of transmitters learned into the decoder [cnt3cnt0]. ? 64 bits of the received transmission with the hop- ping code decrypted. the decoder will terminate the transmission of the data stream at any point where the clock is kept low for longer than 1 ms. therefore, the microcontroller can only clock out the required bits. a maximum of 80 bits can be clocked out of the decoder. figure 4-1: hcs500 decoder and i/o interface lines figure 4-2: decoder valid transmission message note: data is always clocked in/out least significant bit (lsb) first. a0 a1 a2 vss 24lc02 vcc wp scl sd 1 2 3 4 8 7 6 5 v dd ee_clk ee_dat mclr vss rfin s_clk s_dat 1 2 3 4 8 7 6 5 v dd rf receiver sync clock sync data micro reset hcs500 1k decoder signal valid t clkh t ds ab cii t pp 3 t dhi t cla received string ci s_dat tx0 tx3 rx63 rept v low s0 s1 s2 s3 cnt0 cnt3 0 rx0 rx1 rx62 1 s_clk information t pp 1 t clkh t clkl transmission
? 2002 microchip technology inc. ds40153c-page 9 hcs500 4.2 command mode 4.2.1 microcontroller command mode activation the microcontroller command consists of four parts. the first part activates the command mode, the sec- ond part is the actual command, the third is the address accessed, and the last part is the data. the microcon- troller starts the command by taking the clock line high for up to 500 ms. the decoder acknowledges the start- up sequence by taking the data line high. the micro- controller takes the clock line low, after which the decoder will take the data line low, tri-state the data line and wait for the command to be clock in. the data must be set up on the rising edge and will be sampled on the falling edge of the clock line. 4.2.2 collision detection the hcs500 uses collision detection to prevent clashes between the decoder and microcontroller. whenever the decoder receives a valid transmission the following sequence is followed: ? the decoder first checks to see if the clock line is high. if the clock line is high, the valid transmis- sion notification is aborted, and the microcontrol- ler command mode request is serviced. ? the decoder takes the data line high and checks that the clock line doesnt go high within 50 m s. if the clock line goes high, the valid transmission notification is aborted and the command mode request is serviced. ? if the clock line goes high after 50 m s but before 500 ms, the decoder will acknowledge by taking the data line low. ? the microcontroller can then start to clock out the 80-bit data stream of the received transmission. figure 4-3: microcontroller command mode activation msb a command byte start command t clkl t clkh t ds bc lsb t start t cmd d t data e address byte data byte t addr t req t resp clk m c data decoder data msb lsb msb lsb t ack
hcs500 ds40153c-page 10 ? 2002 microchip technology inc. 4.2.3 command activation times the command activation time (table 4-1) is defined as the maximum time the microcontroller has to wait for a response from the decoder. the decoder will abort and service the command request. the response time depends on the state of the decoder when the com- mand mode is requested. 4.2.4 decoder commands the command byte specifies the operation required by the controlling microcontroller. table 4-2 lists the com- mands. table 4-1: command activation times * these parameters are characterized but not tested. table 4-2: decoder commands decoder state min max while receiving transmissions 2.5 ms bpw max = 2.7 ms during the validation of a received transmission 3 ms during the update of the sync counters 40 ms during learn 170 ms instruction command byte operation read f0 16 read a byte from user eeprom write e1 16 write a byte to user eeprom activate_lrn d2 16 activate a learn sequence on the decoder erase_all c3 16 activate an erase all function on the decoder program b4 16 program manufacturers code and configuration byte
? 2002 microchip technology inc. ds40153c-page 11 hcs500 4.2.5 read byte/s from user eeprom the read command (figure 4-4) is used to read bytes from the user eeprom. the offset in the user eeprom is specified by the address byte which is truncated to seven bits (c to d). after the address, a dummy byte must be clocked in (d to e). the eeprom data byte is clocked out on the next rising edge of the clock line with the least significant bit first (e to f). sequential reads are possible by repeating sequence e to f within 1 ms after the falling edge of the previous bytes most significant bit (msb) bit. during the sequential read, the address value will wrap after 128 bytes. the decoder will terminate the read command if no clock pulses are received for a period longer than 1.2 ms. 4.2.6 write byte/s to user eeprom the write command (figure 4-5) is used to write a loca- tion in the user eeprom. the address byte is trun- cated to seven bits (c to d). the data is clocked in least significant bit first. the clock line must be asserted to initiate the write. sequential writes of bytes are possible by clocking in the byte and then asserting the clock line (d C f). the decoder will terminate the write command if no clock pulses are received for a period longer than 1.2 ms after a successful write sequence the decoder will acknowledge by taking the data line high and keeping it high until the clock line goes low. figure 4-4: read bytes from user eeprom figure 4-5: write bytes to user eeprom decoder msb a command byte bc lsb d t rd e address byte dummy byte clk m c data f data byte msb lsb msb lsb msb lsb t rd start command data decoder msb a command byte start command bc lsb d t wr e address byte data byte clk m c data f acknowledge msb lsb msb lsb t ack t resp t ack 2 data
hcs500 ds40153c-page 12 ? 2002 microchip technology inc. 4.2.7 activate learn the activate learn command (figure 4-6) is used to activate a transmitter learning sequence on the decoder. the command consists of a command mode activation sequence, a command byte, and two dummy bytes. the decoder will respond by taking the data line high to acknowledge that the command was valid and that learn is active. upon reception of the first transmission, the decoder will respond with a learn status message (figure 4-7). during learn, the decoder will acknowledge the recep- tion of the first transmission by taking the data line high for 60 ms. the controlling microcontroller can clock out at most eight bits, which will all be zeros. all of the bits of the status byte are zero, and this is used to distin- guish between a learn time-out status string and the first transmission received string. the controlling micro- controller must ensure that the clock line does not go high 60 ms after the falling edge of the data line, for this will terminate learn. upon reception of the second transmission, the decoder will respond with a learn status message (figure 4-8). the learn status message after the second transmis- sion consists of the following: ? 1 start bit. ? the function code [s3:s0] of the message is zero, indicating that this is a status string. ? the result bit indicates the result of the learn sequence. the result bit is set if successful and cleared otherwise. ? the ovr bit will indicate whether an exiting trans- mitter is over written. the ovr bit will be set if an existing transmitter is learned over. ? the [cnt3cnt0] bits will indicate the number of transmitters learned on the decoder. ? the [tx3tx0] bits indicate the block number used during the learning of the transmitter. figure 4-6: learn mode activation figure 4-7: learn status message after first transmission figure 4-8: learn status message after second transmission decoder msb a command byte start command bc lsb d t lrn e dummy byte dummy byte clk m c data f acknowledge msb lsb msb lsb t ack t resp t ack 2 data command request t clkl t clkh t ca t ds ab t cll t dhi t cla t clh clk decoder 0 0 0 0 0 0 0 0 status byte c data communications request t clkl t clkh t ca t ds a b cii t cll t dhi t cla t clh clk decoder tx0 tx3 rx63 ovr rslt 0 0 0 0 cnt0 cnt3 0 rx0 rx1 rx62 1 ci learn status bits decoded tx data
? 2002 microchip technology inc. ds40153c-page 13 hcs500 4.2.8 erase all the erase all command (figure 4-9) erases all the transmitters in the decoder. after the command and two dummy bytes are clocked in, the clock line must be asserted to activate the command. after a successful completion of an erase all command, the data line is asserted until the clock line goes low. 4.3 stand-alone mode the hcs500 decoder can also be used in stand-alone applications. the hcs500 will activate the data line for up to 500 ms if a valid transmission was received, and this output can be used to drive a relay circuit. to acti- vate learn or erase all commands, a button must be connected to the clk input. user feedback is indicated on an led connected to the data output line. if the clk line is pulled high, using the learn button, the led will switch on. after the clk line is kept high for longer than 2 seconds, the decoder will switch the led line off, indicating that learn will be entered if the button is released. if the clk line is kept high for another 6 sec- onds, the decoder will activate an erase_all com- mand. learn mode can be aborted by taking the clock line high until the data line goes high (led switches on). during learn, the data line will give feedback to the user and, therefore, must not be connected to the relay drive circuitry. after taking the clock low and before a transmitter is learn, any low-to-high change on the clock line may ter- minate learn. this has learn implications when a switch with contact bounce is used. 4.4 erase all command and erase command the table 4-3 describes two versions of the erase all command. subcommand 01 can be used where a transmitter with permanent status is implemented in the microcontroller software. use of subcommand 01 ensures that the per- manent transmitter remains in memory even when all other transmitters are erased. the first transmitter learned after any of the following events is the first transmitter in memory and becomes the permanent transmitter: 1. programming of the manufacturers code. 2. erasing of all transmitters (subcommand 00 only). 4.5 test mode a special test mode is activated after: 1. programming of the manufacturers code. 2. erasing of all transmitters. test mode can be used to test a decoder before any transmitters are learned on it. test mode enables test- ing of decoders without spending the time to learn a transmitter. test mode is terminated after the first suc- cessful learning of an ordinary transmitter. in test mode, the decoder responds to a test transmitter. the test transmitter has the following properties: 1. crypt key = manufacturers code. 2. serial number = any value. 3. discrimination bits = lower 10 bits of the serial number. 4. synchronization counter value = any value (synchronization information is ignored). because the synchronization counter value is ignored in test mode, any number of test transmitters can be used, even if their synchronization counter values are different. 4.6 power supply supervisor reliable operation of the hcs500 requires that the contents of the eeprom memory be protected against erroneous writes. to ensure that erroneous writes do not occur after supply voltage brown-out conditions, the use of a proper power supply supervisor device (like microchip part mcp100-450) is imperative. note: the reps bit must be cleared in the con- figuration byte in stand-alone mode. table 4-3: erase all command command byte subcommand byte description c3 16 00 16 erase all transmitters. c3 16 01 16 erase all transmit- ters except 1. the first transmitter in memory is not erased.
hcs500 ds40153c-page 14 ? 2002 microchip technology inc. figure 4-9: erase all figure 4-10: stand-alone mode learn/erase-all timing figure 4-11: typical stand-alone application circuit decoder msb a command byte start command bc lsb d t era e subcommand byte dummy byte clk f acknowledge msb lsb msb lsb t ack t resp t ack 2 data m c data data a erase-all activation t pp 1 t pp 2 clk bc d learn activation t pp 3 successful e t pp 4 output relay spst vcc vcc learn v cc 1k a0 1 a1 2 a2 3 v ss 4 sda 5 scl 6 wp 7 v cc 8 24lc02b v dd 1 eeclk 2 eedat 3 mclr 4 sdat 5 sclk 6 rfin 7 v ss 8 hcs500 npn 10k led 10k 10k v cc vi rst power supply rf receiver supervisor 22 m f note: because each hcs500 is individually matched to its eeprom, in-circuit programming is strongly recommended. in-circuit programming probe pads (note) mcp100-4.5
? 2002 microchip technology inc. ds40153c-page 15 hcs500 5.0 decoder programming the decoder uses a 2k, 24lc02b serial eeprom. the memory is divided between system memory that stores the transmitter information (read protected) and user memory (read/write). commands to access the user memory are described in sections 4.2.5 and 4.2.6. the following information stored in system memory needs to be programmed before the decoder can be used: ? 64-bit manufacturers code ? decoder configuration byte 5.1 configuration byte the decoder is configured during initialization by setting the appropriate bits in the configuration byte. the following table list the options: 5.1.1 lrn_mode lrn_mode selects between two learning modes. with lrn_mode = 0, the normal (serial number derived) mode is selected; with lrn_mode=1, the secure (seed derived) mode is selected. see section 6.0 for more detail on learning modes. 5.1.2 lrn_alg lrn_alg selects between the two available algorithms. with lrn_alg = 0, is selected the k ee l oq decryption algorithm is selected; with lrn_alg = 1, the xor algorithm is selected. see section 6.0 for more detail on learning algorithms. 5.1.3 repeat the hcs500 can be configured to indicate repeated transmissions. in a stand-alone configuration, repeated transmis- sions must be disabled. note 1: these memory locations are read protected and can only be written to using the program command with the device powered up. 2: the contents of the system memory is encrypted by a unique 64-bit key that is stored in the hcs500. to initialize the system memory, the hcs500s program command must be used. the eeprom and hcs500 are matched, and the devices must be kept together. in-circuit programming is therefore recommended. bit mnemonic description 0 lrn_mode learning mode selection lrn_mode = 0normal learn lrn_mode = 1secure learn 1 lrn_alg algorithm selection lrn_alg = 0k ee l oq decryption algorithm lrn_alg = 1xor algorithm 2 repeat repeat transmission enable 0 = disable 1 = enabled 3not used reserved 4not used reserved 5not used reserved 6not used reserved 7not used reserved
hcs500 ds40153c-page 16 ? 2002 microchip technology inc. 5.2 programming waveform the programming command consists of the following: ? command request sequence (a to b) ? command byte (b to c) ? configuration byte (c to d) ? manufacturers code eight data bytes (d to g) ? activation and acknowledge sequence (g to h) 5.3 programming data string a total of 80 bits are clocked into the decoder. the 8-bit command byte is clocked in first, followed by the 8-bit configuration byte and the 64-bit manufacturers code. the data must be clocked in least significant bit (lsb) first. the decoder will then encrypt the manufacturers code using the decoders unique 64-bit eeprom crypt key. after completion of the programming eeprom, the decoder will acknowledge by taking the data line high (g to h). if the data line goes high within 30 ms after the clock goes high, programming also fails. figure 5-1: programming waveform decoder msb msb a command byte start command t clkl t clkh t pp 1 t ds bc lsb t pp 3 t pp 2 t cmd d lsb lsb configuration byte clk m c data msb t data g most significant byte h t ack t wt 2 t aw acknowledge msb e least significant byte f t data t addr t pp 4 data
? 2002 microchip technology inc. ds40153c-page 17 hcs500 6.0 key generation the hcs500 supports three learning schemes which are selected during the initialization of the system eeprom. the learning schemes are: ? normal learn using the k ee l oq decryption algorithm ? secure learn using the k ee l oq decryption algorithm ? secure learn using the xor algorithm 6.1 normal (serial number derived) learn using the k ee l oq decryption algorithm this learning scheme uses the k ee l oq decryption algorithm and the 28-bit serial number of the transmitter to derive the crypt key. the 28-bit serial number is patched with predefined values as indicated below to form two 32-bit seeds. sourceh = 60000000 00000000h + serial number | 28 bits sourcel = 20000000 00000000h + serial number | 28 bits then, using the k ee l oq decryption algorithm and the manufacturers code the crypt key is derived as follows: keyh upper 32 bits = f k ee l oq decryption (sourceh) | 64-bit manufacturers code keyl lower 32 bits = f k ee l oq decryption (sourcel) | 64-bit manufacturers code 6.2 secure (seed derived) learn using the k ee l oq decryption algorithm this scheme uses the secure seed transmitted by the encoder to derive the two input seeds. the decoder always uses the lower 64 bits of the transmission to form a 60-bit seed. the upper 4 bits are always forced to zero. for 32-bit seed encoders (hcs200, hcs201, hcs300, hcs301): sourceh = serial number lower 28 bits sourcel = seed 32 bits for 48-bit seed encoders (hcs360, hcs361): sourceh = serial number (with upper 4 bits set to zero) upper 16 bits <<16 + seed upper 16 bits sourcel = seed lower 32 bits for 60-bit seed encoders (hcs362, hcs365, hcs370, hcs410, hcs412, hcs473): sourceh = seed upper 32 bits (with upper 4 bits set to zero) sourcel = seed lower 32 bits the k ee l oq decryption algorithm and the manufacturers code is used to derive the crypt key as follows: keyh upper 32 bits = decrypt (sourceh) 64 bit manufacturers code keyl lower 32 bits = decrypt (sourcel) 64 bit manufacturers code 6.3 secure (seed derived) learn using the xor algorithm this scheme uses the seed transmitted by the encoder to derive the two input seeds. the decoder always use the lower 64 bits of the transmission to form a 60-bit seed. the upper 4 bits are always forced to zero. for 32-bit seed encoders (hcs200, hcs201, hcs300, hcs301): sourceh = serial number lower 28 bits sourcel = seed 32 bits for 48-bit seed encoders (hcs360/hcs361): sourceh = serial number (with upper 4 bits set to zero) upper 16 bits <<16 + seed upper 16 bits sourcel = seed lower 32 bits for 60-bit seed encoders (hcs362, hcs365, hcs370, hcs410, hcs412, hcs473): sourceh = seed upper 32 bits with upper 4 bits set to zero sourcel = seed lower 32 bits then, using the manufacturers code the crypt key is derived as follows: keyh upper 32 bits = sourceh xor 64-bit manufacturers code upper 32 bits keyl lower 32 bits = sourcel xor 64-bit manufacturers code lower 32 bits
hcs500 ds40153c-page 18 ? 2002 microchip technology inc. 7.0 k ee l oq encoders 7.1 transmission format (pwm) the k ee l oq encoder transmission is made up of sev- eral parts (figure 7-1). each transmission begins with a preamble and a header, followed by the encrypted and then the fixed data. the actual data is 66/69 bits which consists of 32 bits of encrypted data and 34/35 bits of non-encrypted data. each transmission is fol- lowed by a guard period before another transmission can begin. the code hopping portion provides up to four billion changing code combinations and includes the button status bits (based on which buttons were activated), along with the synchronization counter value and some discrimination bits. the non-code hop- ping portion is comprised of the status bits, the function bits, and the 28-bit serial number. the encrypted and non-encrypted combined sections increase the number of combinations to 7.38 x 10 19 . 7.2 code word organization the hcs encoder transmits a 66/69-bit code word when a button is pressed. the 66/69-bit word is con- structed from a code hopping portion and a non-code hopping portion (figure 7-2). the encrypted data is generated from four button bits, two overflow counter bits, ten discrimination bits, and the 16-bit synchronization counter value. the non-encrypted data is made up from 2 status bits, 4 function bits, and the 28/32-bit serial number. figure 7-1: transmission format (pwm) figure 7-2: code word organization logic "1" guard time 50% encrypted portion fixed code portion logic "0" preamble header t e t e t e 10xt e t bp repeat (1-bit) v low (1-bit) button status s2 s1 s0 s3 serial number (28 bits) button status s2 s1 s0 s3 ovr (2 bits) disc (10 bits) sync counter (16 bits) repeat (1-bit) v low (1-bit) button status 1 1 1 1 serial number (28 bits) seed (32 bits) 34 bits of fixed portion 32 bits of encrypted portion 66 data bits transmitted lsb first. lsb msb msb lsb seed replaces encrypted portion when all button inputs are activated at the same time.
? 2002 microchip technology inc. ds40153c-page 19 hcs500 8.0 electrical characteristics for hcs500 absolute maximum ratings ? ambient temperature under bias................................................................................................. ........... -40c to +125c storage temperature ............................................................................................................ .................. -65 c to +150c voltage on any pin with respect to v ss (except v dd )......................................................................... -0.6v to v dd +0.6v voltage on v dd with respect to vss ........................................................................................................... .......0 to +7.5v total power dissipation (note) .............................................................................................................................70 0 mw maximum current out of v ss pin ........................................................................................................................... 200 ma maximum current into v dd pin ........................................................................................................................... ...150 ma input clamp current, i ik (v i < 0 or v i > v dd ) ......................................................................................................... 20 ma output clamp current, iok (v o < 0 or v o >v dd ) .................................................................................................. 20 ma maximum output current sunk by any i/o pin..................................................................................... .....................25 ma maximum output current sourced by any i/o pin .................................................................................. ..................25 ma note: power dissipation is calculated as follows: p dis = v dd x {i dd - ? i oh } + ? {(v dd Cv oh ) x i oh } + ? (v o l x i ol ) ? notice: stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability.
hcs500 ds40153c-page 20 ? 2002 microchip technology inc. table 8-1: dc characteristics standard operating conditions (unless otherwise stated) operating temperature commercial (c): 0 c t a +70c industrial (i): -40c t a +85c symbol parameters min typ (?) max units conditions v dd supply voltage 3.0 5.5 v v por v dd start voltage to ensure reset vssv s vdd v dd rise rate to ensure reset 0.05* v/ms i dd supply current 1.8 0.3 2.4 5 ma m a f osc = 4 mhz, v dd = 5.5v sleep mode (no rf input) i pd power-down current 0.254 m av dd = 3.0v, commercial 0.35 m av dd = 3.0v, industrial v il input low voltage v ss v ss 0.8 0.15 v dd v v v dd between 4.5v and 5.5v otherwise v ss 0.15 v dd vmclr v ih input high voltage 2.0 0.25 v dd + 0.8 v dd v dd v v v dd between 4.5v and 5.5v otherwise 0.85 v dd v dd v mclr v ol output low voltage 0.6 v i ol = 8.7 ma, v dd = 4.5v v oh output high voltage v dd - 0.7 v i oh = -5.4 ma, v dd = 4.5v ? data in typ column is at 5.0v, 25 c unless otherwise stated. these parameters are for design guidance only and are not tested. * these parameters are characterized but not tested. note: negative current is defined as coming out of the pin. table 8-2: ac characteristics standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units conditions t e transmit elemental period 65 660 m s t od output delay 48 75 237 ms t mclr mclr low time 150 ns t ov time output valid 150 222 ms * these parameters are characterized but not tested.
? 2002 microchip technology inc. ds40153c-page 21 hcs500 figure 8-1: reset watchdog timer, oscillator start-up timer and power-up timer timing v dd mclr i/o pins to v t mclr
hcs500 ds40153c-page 22 ? 2002 microchip technology inc. 8.1 ac electrical characteristics 8.1.1 command mode activation 8.1.2 read from user eeprom command 8.1.3 write to user eeprom command standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units t req command request time 0.0150 500 ms t resp microcontroller request acknowledge time 1ms t ack decoder acknowledge time 30 m s t start start command mode to first command bit 20 1000 m s t clkh clock high time 20 1000 m s t clkl clock low time 20 1000 m s f clk clock frequency 500 25000 hz t ds data hold time 14 m s t cmd command validate time 10 m s t addr address validate time 10 m s t data data validate time 10 m s * these parameters are characterized but not tested. standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c e ta +85c symbol parameters min typ max units t rd decoder eeprom read time 400 1500 m s * these parameters are characterized but not tested. standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units t wr write command activation time 20 1000 m s t ack eeprom write acknowledge time 10 ms t resp microcontroller acknowledge response time 20 1000 m s t ack 2 decoder response acknowledge time 10 m s * these parameters are characterized but not tested.
hcs500 ? 2002 microchip technology inc. ds40153c-page 23 8.1.4 activate learn command in micro mode 8.1.5 activate learn command in stand-alone mode 8.1.6 learn status string standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70 c industrial (i): -40c ta +85c symbol parameters min typ max units t lrn learn command activation time 20 1000 m s t ack decoder acknowledge time 20 m s t resp microcontroller acknowledge response time 20 1000 m s t ack 2 decoder data line low 10 m s * these parameters are characterized but not tested. standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units t pp 1 command request time 100 ms t pp 2 learn command activation time 2 s t pp 3 erase-all command activation time 6 s * these parameters are characterized but not tested. standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c e ta +85c symbol parameters min typ max units t dhi command request time 500 ms t cla microcontroller command request time 0.005 500 ms t ca decoder request acknowledge time 10 m s t clh clock high hold time 1.2 ms t cll clock low hold time 0.020 1.2 ms t clkh clock high time 20 1000 m s t clkl clock low time 20 1000 m s f clk clock frequency 500 25000 hz t ds data hold time 5 m s * these parameters are characterized but not tested.
hcs500 ds40153c-page 24 ? 2002 microchip technology inc. 8.1.7 erase all command 8.1.8 programming command standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units t era learn command activation time 20 1000 m s t ack decoder acknowledge time 20 210 ms t resp microcontroller acknowledge response time 20 1000 m s t ack 2 decoder data line low 10 m s * these parameters are characterized but not tested. standard operating conditions (unless otherwise specified): commercial (c): 0c ta +70c industrial (i): -40c ta +85c symbol parameters min typ max units t pp 1 command request time 500 ms t pp 2 decoder acknowledge time 1 ms t pp 3 start command mode to first command bit 20 1000 m s t pp 4 data line low before tri-stated 5 m s t clkh clock high time 20 1000 m s t clkl clock low time 20 1000 m s f clk clock frequency 500 25000 hz t ds data hold time 5 m s t cmd command validate time 10 m s t ack command acknowledge time 30 240 ms t wt 2 acknowledge respond time 20 1000 m s t alw data low after clock low 10 m s * these parameters are characterized but not tested.
? 2002 microchip technology inc. ds40153c-page 25 hcs500 figure 8-2: typical microcontroller interface circuit v cc 1k a0 1 a1 2 a2 3 v ss 4 sda 5 scl 6 wp 7 v cc 8 24lc02b v dd 1 eeclk 2 eedat 3 mclr 4 sdat 5 sclk 6 rfin 7 v ss 8 hcs500 10k v cc vi rst power supply rf receiver supervisor note: because each hcs500 is individually matched to its eeprom, in-circuit programming is strongly recommended. in-circuit programming probe pads (note) mcp100-4.5 microcontroller mclr data clock
hcs500 ds40153c-page 26 ? 2002 microchip technology inc. 9.0 packaging information 9.1 package marking information 8-lead pdip (300 mil) example 8-lead soic (150 mil) example xxxxxxxx xxxxxnnn yyww hcs500 xxxxxnnn 0025 xxxxxxx xxxyyww nnn hcs500 xxx0025 nnn legend: xx...x customer specific information* y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard picmicro device marking consists of microchip part number, year code, week code, and traceability code. for picmicro device marking beyond this, certain price adders apply. please check with your microchip sales office. for qtp devices, any special marking adders are included in qtp price.
? 2002 microchip technology inc. ds40153c-page 27 hcs500 9.2 package details 8-lead plastic dual in-line (p) - 300 mil (pdip) b1 b a1 a l a2 p a e eb b c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top a 51015 51015 mold draft angle bottom b 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010 (0.254mm) per side. significant characteristic
hcs500 ds40153c-page 28 ? 2002 microchip technology inc. 8-lead plastic small outline (sm) - medium, 208 mil (soic) foot angle f 048048 15 12 0 15 12 0 b mold draft angle bottom 15 12 0 15 12 0 a mold draft angle top 0.51 0.43 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.64 0.51 .030 .025 .020 l foot length 5.33 5.21 5.13 .210 .205 .202 d overall length 5.38 5.28 5.11 .212 .208 .201 e1 molded package width 8.26 7.95 7.62 .325 .313 .300 e overall width 0.25 0.13 0.05 .010 .005 .002 a1 standoff 1.98 .078 a2 molded package thickness 2.03 .080 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units a a2 a a1 l c b f 2 1 d n p b e e1 .070 .075 .069 .074 1.78 1.75 1.97 1.88 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 (0.254mm) per side. drawing no. c04-056 significant characteristic
? 2002 microchip technology inc. ds40153c-page 29 hcs500 on-line support microchip provides on-line support on the microchip world wide web (www) site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape or microsoft explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available by using your favorite internet browser to attach to: www.microchip.com the file transfer site is available by using an ftp ser- vice to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: ? latest microchip press releases ? technical support section with frequently asked questions ? design tips ? device errata ? job postings ? microchip consultant program member listing ? links to other useful web sites related to microchip products ? conferences for products, development systems, technical information and more ? listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive any currently available upgrade kits.the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world.
hcs500 ds40153c-page 30 ? 2002 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this data sheet. to : technical publications manager re: reader response total pages sent from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds40153c hcs500 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this data sheet easy to follow? if not, why? 4. what additions to the data sheet do you think would enhance the structure and subject? 5. what deletions from the data sheet could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? 8. how would you improve our software, systems, and silicon products?
? 2002 microchip technology inc. ds40153c-page 31 hcs500 hcs500 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support package: p = plastic dip (300 mil body), 8-lead sm = plastic soic (207 mil body), 8-lead temperature blank = 0 c to +70 c range: i = C40c to +85c device: hcs500 code hopping decoder hcs500t code hopping decoder (tape and reel) hcs500 /p data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
hcs500 ds40153c-page 32 ? 2002 microchip technology inc. notes:
2002 microchip technology inc. ds40153c - page 33 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchips products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq , mplab, pic, picmicro, picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microid, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999. the companys quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms and microperipheral products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001 certified. microchips secure data products are covered by some or all of the following patents: code hopping encoder patents issued in europe, u.s.a., and r.s.a. u.s.a.: 5,517,187; europe: 0459781; r.s.a.: za93/4726 secure learning patents issued in the u.s.a. and r.s.a. u.s.a.: 5,686,904; r.s.a.: 95/5429
ds40153c-page 34 ? 2002 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-7456 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-6766200 fax: 86-28-6766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1315, 13/f, shenzhen kerry centre, renminnan lu shenzhen 518001, china tel: 86-755-2350361 fax: 86-755-2366086 hong kong microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, oshaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-334-8870 fax: 65-334-8850 taiwan microchip technology taiwan 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc dactivite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 italy microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom arizona microchip technology ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 01/18/02 w orldwide s ales and s ervice

▲Up To Search▲

Price & Availability of HCS500SM

	To Download HCS500SM Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .